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Sarcina Teams with Keysight to Deliver Advanced Packages
All aspects of semiconductor design and manufacturing require collaboration across a global ecosystem. As complexity increases, so does the importance of good collaboration. This is especially true for advanced package design. Thanks to the movement to multi-die design, package development has become an incredibly difficult task. Navigating the many different materials and topologies required to deliver an optimal package for devices such as CPUs/GPUs/NPUs has evolved into a highly specialized endeavor. This is a story of how one company addresses these needs and who it partners with to get the job done. You will learn a lot about design practices and design technologies as we explore how Sarcina teams with Keysight to deliver advanced packages.
Backdrop For the Story
Founded in 2011 in Palo Alto, CA, Sarcina Technology offers a broad range of package, test, and qualification services. The company created the Application Specific Advanced Packaging, or ASAP category. It provides advanced package design, test, assembly and production management services to a broad range of customers with a noteworthy 100 percent first-time package tape out success track record. You can learn more about Sarcina on SemiWiki here.
As a premier “wafer-in, package-out” service provider, Sarcina incorporates the latest standards for interconnect, such as GDDR6, PCIe Gen 6, and 112 Gbps SerDes. Many of the designs it works on are literal powerhouses, drawing hundreds of watts during peak operation. Packages designed by Sarcina have found their way into diverse applications, ranging from consumer electronics to space travel, like the Falcon 9 mission to the International Space Station in May 2020.
To be so successful in such a difficult market is a true testament to the team at Sarcina. Larry Zu, the company’s CEO has been there since the beginning, guiding the company to become the sought-after supplier it is today. As I mentioned earlier, this kind of work can’t be done in a vacuum. Collaboration is always required. In the case of Sarcina, Larry recently discussed the particular demands his company faces for simulation and analysis and how Keysight provides the margin of victory for his team.
For those unfamiliar with Keysight Technologies, it is an S&P 500 company that delivers market-leading design, emulation, and test solutions. Its goal is to help engineers develop and deploy faster, with less risk, throughout the entire product life cycle. You can learn more about Keysight EDA on SemiWiki here.
The story is captured in a very informative Case Study. If you want to learn about the complexity of advanced package design and why companies like Sarcina and Keysight should be on your radar, I highly recommend you download your own copy. A link is coming, but first let’s look at the dimensions of the discussion.
Sarcina/Keysight Case Study – An Overview
Accurate signal path analysis becomes a major challenge for advanced package design. Sarcina package design methodology features full channel simulation. The challenge is to enable accurate, fast simulation using real-world models, without slowing down the engineering team.
Standard, SPICE-based tools can fall short. Lack of a good user interface among tools, and the need for a lot of text-based model configuration can slow things down. Sarcina’s engineers wanted a tool that would focus more on the task at hand and maintain model accuracy without getting bogged down in scripting. There is more detail provided in the Case Study, but you get the idea.
By adopting Keysight’s PathWave Advanced Design System (ADS) and Memory Designer, and a multi-model signal path approach, Sarcina was able to create a highly productive end-to-end workflow. The Case Study provides a lot of detail about how this flow effectively addressed the many signal and power integrity challenges faced by the Sarcina team.
The details of how this flow is deployed tell you a lot about what’s required to deliver an advanced package design and why advanced tools and flow are so critical. A couple of quotes from Larry Zu are useful here:
“You know, at 54 Gbps data rate and with bi-directional simulation, we can validate not only the silicon but also the package and the PCB.”
“Based on the scale of our simulations, getting convergence can be a big challenge. We’re not just simulating a few components. We’re dealing with hundreds of components, so the accuracy, and resolving SPICE convergence issues are very important.”
Many results are provided to illustrate the accuracy Sarcina engineers achieved with the Keysight flow. One example is a high-speed NPU. Sarcina created an advanced package design that utilized 6400 MT/s LPDDR5 memory. Configuring the package layer stack, power and ground references, and routing according to the electrical requirements enabled Sarcina to create a first-time success with a very demanding signaling scheme in a fraction of the time it would take using other tools.
The graphic at the top of this post is that package substrate design. You will see the details in the Case Study, but one more quote from Larry is useful:
“We did a measurement with Keysight test equipment. We captured an eye diagram from the measured computer screen and compared it against the simulation result. We positioned them one on top of each other and they were practically identical.”
To Learn More
If you want to learn about the right tools, techniques, and partners to address the demands of advanced package design, I highly recommend this Case Study. You can download your copy here. The Case Study also provides many useful links to learn about Sarcina and Keysight. And that’s how Sarcina teams with Keysight to deliver advanced packages.
Sarcina Design Team
The Sarcina design team is located in Taipei, Taiwan strategically close to its major foundry and OSAT partners. They are in the same time zone and speak the same language as their critical partners, responding to design, test and manufacturing issues in a timely manner. Sarcina’s world-class engineering team members have between 10 and 25 years of experience designing hundreds of packages for iconic global customers such as Broadcom, Marvell, NXP, Google, Juniper, Cadence, ZTE and H3C.
Today, millions of their packages run mission-critical computing and communication tasks around the globe.
