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© Sarcina Technology LLC, All Rights Reserved.

Established in 2011, Sarcina Technology set the groundwork for a developing segment within the semiconductor industry value chain known as the Application Specific Advanced Packing Service.

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Services

  • Package Design
  • Model Extraction
  • Simulation
  • Channel Simulation
  • Design of Manufacturing
  • SiP and MCM
  • 56 Gb/s PAM-4
  • Wafer Probe Card
  • Final Test Hardware
  • Test Program Development

Contact Us

  • A: Seestrasse 21
  • T: 00 1 23 45 67 89
  • E: qi@example.com
  • T: 99 8 76 54 321

© 2024 Sarcina, All Rights Reserved by Design Sketchres

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2.5 D-Si Interposer Package Futuristic
2.5 D-Si Interposer Package Real without background
Automotive Package Futuritic
Blockchain Package Futuristic
High Power Speed Pin Count Microprocessor Package with Decoupling Capacitors at Backside scaled
Network Processor Package without Lid
Photonic IC package Futuristic
Space Grade Package Futuristic
Stacked Chiplet Package Showing All the Wires
Wafer Probe Head To Sort Bumped Wafers