Wafer Probe Card


(Courtesy of Teradyne)

Sarcina uses its in-house package substrate as the space transformer. This connects the probe head with the probe card loadboard. This approach offers the closest imitation to how the actual device will operate when a die is assembled inside a package. It reduces the lead time for probe card design and fabrication and lowers the cost of probe card NRE.

Sarcina also employs its rigorous PI/SI channel simulation technology on every piece of hardware to ensure the designed probe card meets customer requirement. Our in-depth analysis ensures first time success and allows us to save time and cut costs.

A quick rundown of our wafer probing process: Sarcina first provides a trusted wafer probing design company with the circuit schematic, and they then create the PCB layout. For the probe card, we provide the probe pin location map for the probe head to be designed. After that, we run electrical simulations to check for power and signal integrity, and if the specs are met, we tape out either the loadboard or probe card.